module Clock_Test;
	reg clock;
	integer i;
	always @(clock) begin
		if(i == 20) $stop;
		else i = i+1;
		#1 clock <= ~clock;
		
	end
	
	initial begin
		clock = 0;
		i = 0;
		$monitor("time = %0d, clock is %b",$time,clock);
	end
endmodule
